/*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------*/
// pegpci.hpp - PCI functions
//
// Author: Jim DeLisle
//
// Copyright (c) 1997-2002 Swell Software 
//              All Rights Reserved.
//
// Unauthorized redistribution of this source code, in whole or part,
// without the express written permission of Swell Software
// is strictly prohibited.
//
// Notes:
//
/*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------*/

#ifndef _PEGPCI_HPP_
#define _PEGPCI_HPP_

/*--------------------------------------------------------------------------*/
// PEG_PCI_CONFIG structure - when you absolutely positively have to know 
// everything about a PCI device...
/*--------------------------------------------------------------------------*/
typedef struct {
    PEGUINT Vendor;
    PEGUINT Device;
    PEGUINT Command;
    PEGUINT Status;
    PEGUBYTE Rev;
    PEGUBYTE ProgIf;
    PEGUBYTE SubClass;
    PEGUBYTE BaseClass;
    PEGUBYTE CacheLineSize;
    PEGUBYTE Latency;
    PEGUBYTE HeaderType;
    PEGUBYTE BIST;
    PEGULONG BaseAddr1;
    PEGULONG BaseAddr2;
    PEGULONG BaseAddr3;
    PEGULONG BaseAddr4;
    PEGULONG BaseAddr5;
    PEGULONG BaseAddr6;
} PEG_PCI_CONFIG;

/*--------------------------------------------------------------------------*/
// Prototypes and externs
/*--------------------------------------------------------------------------*/
#if defined(PEG_COLDFIRE)

extern void     PegColdfirePCIConfig(void);
extern PEGULONG PegColdfireReadPCIConfigReg(PEGUINT iIndex);
extern void     PegColdfireWritePCIConfigReg(PEGUINT iIndex, PEGULONG Val);
extern void     PegColdfireWriteIOReg(PEGULONG Address, PEGUBYTE uVal);
extern PEGUBYTE PegColdfireReadIOReg(PEGULONG Address);

#else

extern PEGUBYTE PEGFAR* PegPCIGetVideoAddress(PEGULONG dwClass,
     PEGUINT wVendor,  PEGUINT wDevice);

extern PEGBOOL PegPCIReadControllerConfig(PEGULONG dwClass, PEGUINT wVendor, 
     PEGUINT wDevice, PEG_PCI_CONFIG* pConfig);

#endif

/*--------------------------------------------------------------------------*/
// Vendor and chip IDs
//
// The screen driver defines one of the following that describes the video
// hardware. Note that all drivers relating to a particular piece of
// hardware will all define the same identifier (ie the 8bpp and 24bpp
// drivers for the CT69000 both define PEGPCI_CT69000).
//
// Also note that we map everything to the generic defines of
// PEGPCI_VENDORID and PEGPCI_DEVICEID so that all of the screen drivers
// look (more or less) the same in the GetVideoAddress function.
//
// The Epson eval cards have a non-standard way of using ID's, so 
// don't be alarmed by the goofy looking VGACLASS.
/*--------------------------------------------------------------------------*/
#if defined(PEGPCI_CL54XX)

//#define PEGPCI_VENDORID     0x1300
//#define PEGPCI_DEVICEID     0x0000

#define PEGPCI_VENDORID     0x1013
//#define PEGPCI_DEVICEID     0x00a0     // CLGD5430
#define PEGPCI_DEVICEID     0x00a4     // CLGD5434-4
//#define PEGPCI_DEVICEID     0x00a8     // CLGD5434-8
//#define PEGPCI_DEVICEID     0x00ac     // CLGD5436
//#define PEGPCI_DEVICEID     0x00b8     // CLGD5446

#elif defined(PEGPCI_CT65545)

#define PEGPCI_VENDORID     0x102c
#define PEGPCI_DEVICEID     0x00d8

#elif defined(PEGPCI_CT65550)

#define PEGPCI_VENDORID     0x102c
#define PEGPCI_DEVICEID     0x00e0

#elif defined(PEGPCI_CT69000)

#define PEGPCI_VENDORID     0x102c
#define PEGPCI_DEVICEID     0x00c0

#elif defined(PEGPCI_MQ200)

#define PEGPCI_VENDORID     0x4d51
#define PEGPCI_DEVICEID     0x0200
#define PEGPCI_VGACLASS     0x038000

#elif defined(PEGPCI_PERMEDIA)

#define PEGPCI_VENDORID     0x104c
#define PEGPCI_DEVICEID     0x3d07

#elif defined(PEGPCI_SED1356)

//#define PEGPCI_VENDORID     0xf4
#define PEGPCI_VENDORID     0x10f4
#define PEGPCI_DEVICEID     0x00
#define PEGPCI_VGACLASS     0xff0000

#elif defined(PEGPCI_SED1376)

#define PEGPCI_VENDORID     0x14eb
#define PEGPCI_DEVICEID     0x24
#define PEGPCI_VGACLASS     0xff0000

#elif defined(PEGPCI_SED1386)

//#define PEGPCI_VENDORID     0xf4
#define PEGPCI_VENDORID     0x10f4
#define PEGPCI_DEVICEID     0x00
#define PEGPCI_VGACLASS     0xff0000

#elif (defined(PEGPCI_S1D13A03) || defined(PEGPCI_S1D13A04))

//#define PEGPCI_VENDORID     0xf4
#define PEGPCI_VENDORID     0x14eb
#define PEGPCI_DEVICEID     0x00
#define PEGPCI_VGACLASS     0xff0000

#elif (defined(PEGPCI_S1D1374x))

#define PEGPCI_VENDORID     0x14eb
#define PEGPCI_DEVICEID     0x0020 
#define PEGPCI_VGACLASS     0xff0000

#elif defined(PEGPCI_S1D13513)

#define PEGPCI_VENDORID     0x14eb
#define PEGPCI_DEVICEID     0x0030 
#define PEGPCI_VGACLASS     0xff0000

#elif defined(PEGPCI_S1D13700)

#define PEGPCI_VENDORID     0x14eb
#define PEGPCI_DEVICEID     0x0
#define PEGPCI_VGACLASS     0xff0000


#elif (defined(PEGPCI_SILICON_MOTION_LYNX_3DM))

#define PEGPCI_VENDORID  0x126f
#define PEGPCI_DEVICEID  0x0720

#elif (defined(PEGPCI_SM712))

#define PEGPCI_VENDORID  0x126f
#define PEGPCI_DEVICEID  0x0712

#endif

#if defined(PEG_COLDFIRE)

// define memory base, io base, and slot ID


#define PEGPCI_MEMBASE      0x80000000  // base of PCI vid mem
#define PEGPCI_IOBASE       0xd1000000  // base of PCI IO mem
#define PEGPCI_SLOTID       2           // slot num of graphics chip
#define FRAME_BUFFER_BASE   PEGPCI_MEMBASE

#define PAR_PCIBG       0xa48
#define PAR_PCIBR       0xa4a

#define PCISCR          0xb04
#define PCICR1          0xb0c
#define PCICR2          0xb3c

#define PCIGSCR         0xb60
#define PCIIWOBTAR      0xb70
#define PCIIW1BTAR      0xb74
#define PCIIW2BTAR      0xb78
#define PCIIWCR         0xb80
#define PCIICR          0xb84
#define PCITER          0x840c
#define PCIISR          0xb88
#define PCICAR          0xbf8

#define PCI_ACR         0xc00       // arbiter configuration reg

//#define PEG_PCI_LAT_TIMER  32
#define PEG_PCI_LAT_TIMER 0
#define PEG_PCI_CACHE_LINE  8
#define PEG_PCI_MAX_LAT    42
#define PEG_PCI_MIN_GNT     1

#endif

/*--------------------------------------------------------------------------*/
// This is the generic VGA class definition. Pharlap reads the entire 24bit
// Class Code register and expects our VGA class to be the entire 24 bits.
// You may have to adjust this for your RTOS. The generic version is only
// the Class Code high 8 bits, disregarding the 8 bits of Sub-Class Code
// and 8 bits of ProgI/F.
//
// You may end up with a 24 bit value that looks like this: 0x038000 which
// would be a VGA controller with a sub-class of "Other display controller".
//
// Some controllers, such as the Epson series, simply put 0xff0000 in their
// class since the eval cards are made to be used on the PCI bus, but the
// chip set itself for the target hardware would not have this support.
/*--------------------------------------------------------------------------*/

#if !defined(PEGPCI_VGACLASS)

#if defined(PEG_PHARLAP) || defined(PEGSMX)
#define PEGPCI_VGACLASS     0x030000
#else
#define PEGPCI_VGACLASS     0x03
#endif

#endif

/*--------------------------------------------------------------------------*/
// If running standalong with Paradigm compiler, need to define register
// number that holds base address:
/*--------------------------------------------------------------------------*/

#if defined(__PARADIGM__)
#define PCI_REG_BASE_ADDR0 0x10
#endif

#endif  // _PEGPCI_HPP_


// End of file



